Title :
Optimization of canonic signed digit multipliers for filter design
Author :
Hartley, Richard
Author_Institution :
General Electric CRD, Schenectady, NY, USA
Abstract :
Constant multiplication can be carried out efficiently using a canonical signed-drift (CSD) representation of the multiplier. With this method, the multiplier can be implemented using a series of shifts and additions or subtractions. The author considers the optimization of such CSD multipliers by finding the correct sequence for shifting and adding. A computer program has been Written that will synthesize CSD multipliers in such a way as to minimize hardware and latency, producing optimal CSD multipliers. Applying these methods to finite-impulse-response (FIR) expressions, it is possible to reduce greatly the number of arithmetic operations needed
Keywords :
circuit CAD; digital arithmetic; digital filters; filtering and prediction theory; multiplying circuits; FIR filters; arithmetic operations; canonic signed digit multipliers; computer program; filter design; finite-impulse-response; Adders; Arithmetic; Clocks; Data flow computing; Delay; Design optimization; Finite impulse response filter; Hardware; Latches; Writing;
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
DOI :
10.1109/ISCAS.1991.176054
