Title :
STAIC: a synthesis tool for CMOS and BiCMOS analog integrated circuits
Author :
Harvey, J. Paul ; Elmasry, M.I. ; Leung, B.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Abstract :
STAIC is an interactive design tool that synthesizes CMOS and BiCMOS analog integrated circuits which conform to specified performance constraints. STAIC features an input modeling language for entering hierarchical circuit descriptions and a symbolic/numeric solver unit for dynamic integration of analytical model equations across hierarchical boundaries. All model descriptions include physical layout so that important net parasitics may be fully accounted for during design evaluation. Synthesis proceeds via successive solution refinement. Multilevel models of increasing sophistication are used by scan and optimization modules to home-in on a global optimal solution. Design experiments have shown that STAIC can produce satisfactory results
Keywords :
BIMOS integrated circuits; CMOS integrated circuits; analogue circuits; circuit layout CAD; linear integrated circuits; BiCMOS; CMOS; STAIC; analog integrated circuits; analytical model equations; design evaluation; design experiments; dynamic integration; global optimal solution; hierarchical boundaries; hierarchical circuit descriptions; input modeling language; interactive design tool; multilevel models; net parasitics; optimization modules; performance constraints; physical layout; scan modules; successive solution refinement; symbolic/numeric solver unit; synthesis tool; Analog integrated circuits; Analytical models; Application specific integrated circuits; BiCMOS integrated circuits; CMOS analog integrated circuits; Circuit synthesis; Digital integrated circuits; Equations; Integrated circuit synthesis; Space exploration;
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
DOI :
10.1109/ISCAS.1991.176058
