• DocumentCode
    2822768
  • Title

    A study of performance comparison of digital multipliers using 22nm strained silicon technology

  • Author

    Sabeetha, S. ; Ajayan, J. ; Shriram, S. ; Vivek, K. ; Rajesh, V.

  • Author_Institution
    Dept. of ECE, MIT, Puducherry, India
  • fYear
    2015
  • fDate
    26-27 Feb. 2015
  • Firstpage
    180
  • Lastpage
    184
  • Abstract
    Multiplication is one of the most important fundamental operations in applications such as Digital Signal Processing and in ALU of the microprocessors. Since multiplication dominates the execution time and power consumption of most of the digital signal processing applications, high speed and low power multipliers are essential for next generation processors. This paper presents a detailed study of performance comparison of different types of multipliers such as Array Multiplier, Carry Save Multiplier, Wallace Tree Multiplier and Baugh Wooley Multiplier. The simulations were performed using 22nm predictive technology model with a supply voltage of 0.8V. Results show that baugh wooley multiplier is the fastest multiplier with the least delay.
  • Keywords
    digital arithmetic; multiplying circuits; Baugh-Wooley Multiplier; Wallace tree multiplier; array multiplier; carry save multiplier; digital multiplier performance comparison; digital signal processing applications; predictive technology model; size 22 nm; strained silicon technology; voltage 0.8 V; Adders; Arrays; Delays; Digital signal processing; Power demand; Temperature; Transistors; Array Multiplier; Baugh Wooley Multiplier; Carry Save Multiplier; Low power Design; Wallace Tree Multiplier;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics and Communication Systems (ICECS), 2015 2nd International Conference on
  • Conference_Location
    Coimbatore
  • Print_ISBN
    978-1-4799-7224-1
  • Type

    conf

  • DOI
    10.1109/ECS.2015.7124888
  • Filename
    7124888