• DocumentCode
    2822955
  • Title

    Multiview encoder parallelized fast search realization on NVIDIA CUDA

  • Author

    Lu, Chih-Te ; Hang, Hsueh-Ming

  • Author_Institution
    Dept. of Comput. Sci. & Inform. Technol., Nat. Taipei Univ. of Technol., Taipei, Taiwan
  • fYear
    2011
  • fDate
    6-9 Nov. 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    NVIDIA announced a powerful GPU architecture called Compute Unified Device Architecture (CUDA) in 2007, which is able to provide massive data parallelism under the SIMD architecture constraint. We use NVIDIA GTX-280 GPU system, which has 240 computing cores, as the platform to implement a very complicated video coding scheme, the Multiview Video Coding (MVC) scheme. MVC is an extension of H.264/MPEG-4 Part 10 AVC. It is an efficient video compression scheme; however, its computational complexity is very high. Two of its most time- consuming components are motion estimation (ME) and disparity estimation (DE). In this thesis, we propose a fast search algorithm, called multithreaded one-dimensional search (MODS). It can be used to do both the ME and the DE operations. We implement the integer-pel ME and DE processes with MODS on the GTX-280 platform. The speedup ratio can be 89 times faster than the CPU only configuration. Even when the fast search algorithm of the original JMVC is turned on, the MODS version on CUDA can still be 20 times faster.
  • Keywords
    graphics processing units; motion estimation; parallel architectures; video coding; AVC; CUDA; GPU architecture; H.264/MPEG-4; MODS; NVIDIA GTX-280 GPU system; SIMD architecture; compute unified device architecture; disparity estimation; motion estimation; multithreaded one-dimensional search; multiview encoder; multiview video coding; parallelized fast search realization; Computer architecture; Encoding; Graphics processing unit; Instruction sets; Kernel; Motion estimation; Video coding; CUDA; GPU; H.264/AVC; Multi-core; Multiview video coding (MVC); disparity estimation; fast search algorithm; motion estimation; parallel;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Visual Communications and Image Processing (VCIP), 2011 IEEE
  • Conference_Location
    Tainan
  • Print_ISBN
    978-1-4577-1321-7
  • Electronic_ISBN
    978-1-4577-1320-0
  • Type

    conf

  • DOI
    10.1109/VCIP.2011.6116010
  • Filename
    6116010