FPGA implementation of voltage regulator module for system on chip

This paper describes the design of High frequency, low power DC-DC step down voltage regulator module validated on Field Programmable Gate Arrays (FPGA). The key components of voltage regulator are a digital pulse width modulator(DPWM) based on second order sigma-delta concept (Σ-Δ DPWM), Digital PID controller and reference voltage with soft start. The converter operates with a switching frequency of 3MHz. The buck converter performs 3.6V to 0.9V conversion with an effective DPWM resolution of 12 bits, suitable for SOC integration, under DSM (Deep Sub-Micron) technology of 90nm. A line regulation of 1.44% and a load regulation of 1.38% are achieved. A response time of 0.15ms is obtained for a load change of 0.4A to 0.6A. Theoretical maximum conversion efficiency of 93.45% obtained.