Title :
A massively parallel VLSI architecture suitable for high-resolution FFT
Author :
Shin, Kyung-Wook ; Lee, Moon-Key
Author_Institution :
Integrated Circuit Technol. Dept., Electron. & Telecommun. Res. Inst., Deajeon, South Korea
Abstract :
A new VLSI-oriented array architecture is presented which is suitable for parallel computation of high-resolution fast Fourier transform (FFT). A complete algorithm for computing the FFT on the proposed architecture is also described. With the new index mapping method developed in this work, the architecture offers the following features: (i) a superior time performance of O(N1/4) compared to O(N 1/2) of 2-D mesh array for N-point FFT, (ii) architectural modularity based on two-dimensional subarray modules, (iii) massively parallel processing capability and local communication between processing elements (PEs). Moreover, the adoption of half-butterfly arithmetic (HBA) as the arithmetic function of PE optimizes the performance in terms of reduced data communications between PEs and 100% PE utilization efficiency
Keywords :
VLSI; digital signal processing chips; fast Fourier transforms; parallel architectures; special purpose computers; VLSI architecture; architectural modularity; array architecture; fast Fourier transform; half-butterfly arithmetic; high-resolution FFT; index mapping method; local communication; massively parallel architecture; massively parallel processing capability; parallel computation; reduced data communications; time performance; utilization efficiency; Computer architecture; Concurrent computing; Data communication; Hardware; Integrated circuit technology; Laboratories; Pipeline processing; Signal processing algorithms; Telecommunication computing; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
DOI :
10.1109/ISCAS.1991.176190
