Title :
An array processor design methodology for hard real-time systems
Author :
Jayasinghe, J.A.K.S. ; El-Hadidy, F. Moelaert ; Hermann, O.E.
Author_Institution :
Twente Univ., Enschede, Netherlands
Abstract :
An array processor design methodology suitable for hard real-time systems is presented. Scheduling and projection of the dependence graph (DG) are solved using integer programming. By exploring the regularity of the DG it is possible to solve the necessary IP problems in an efficient manner. This methodology provides a unified approach for linear and nonlinear projection of regular and partially regular DGs
Keywords :
parallel architectures; real-time systems; scheduling; array processor design methodology; dependence graph; hard real-time systems; integer programming; regularity; systematic design methodology; Algorithm design and analysis; Automation; Delay; Design methodology; Process design; Real time systems; Scalability; Timing; Very large scale integration; Visualization;
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
DOI :
10.1109/ISCAS.1991.176194
