B-HIVE: hardware and software for an experimental multiprocessor

Author

Agrawal, Dharma P. ; Alexander, Winser E. ; Gehringer, Edward F. ; Mauney, Jon ; Miller, Thomas K.

Author_Institution

North Carolina State Univ., Raleigh, NC, USA

Volume

i

fYear

1990

fDate

2-5 Jan 1990

Firstpage

40

Lastpage

47

Abstract

B-HIVE, a 24-node experimental multiprocessor computer, is based on a generalized hypercube interconnection structure and features two processors at each node: one to perform application processing and the other to handle communication. The design of the B-HIVE hardware and software is intended to keep run-time overhead to a minimum, and thus provide high performance on a variety of problems, especially signal and image processing. Topics addressed include the B-HIVE multicomputer architecture and node structure, interprocessor communication, software support, and project status

Keywords

multiprocessing systems; multiprocessor interconnection networks; parallel architectures; parallel processing; 24-node experimental multiprocessor computer; B-HIVE; application processing; generalized hypercube interconnection structure; hardware; high performance; image processing; interprocessor communication; multicomputer architecture; node structure; project status; run-time overhead; signal processing; software support; Application software; Computer science; Coupling circuits; Data communication; Hardware; Hypercubes; Packet switching; Protocols; Signal design; Spine;

fLanguage

English

Publisher

ieee

Conference_Titel

System Sciences, 1990., Proceedings of the Twenty-Third Annual Hawaii International Conference on

Conference_Location

Kailua-Kona, HI

Type

conf

DOI

10.1109/HICSS.1990.205097

Filename

205097