System-Level Evaluation of Video Processing System Using SimpleScalar-Based Multi-core Processor Simulator

Author

Du, Zidong ; Xia, Bingbing ; Qiao, Fei ; Yang, Huazhong

Author_Institution

Dept. of Electron. Eng., Tsinghua Univ., Beijing, China

fYear

2011

fDate

23-27 March 2011

Firstpage

256

Lastpage

259

Abstract

Multi-core processor Simulation Platform is always a very important tool in modern multi-core processor design for the system-level design and evaluation. In this paper, a multi-core processor simulator is proposed by modifying Simple Scalar v3.0to simulate parallelized multi-core programs. Shared memory is used for the communication between different cores, which is the communication network among several different parts of the parallelized program separately. Two simulators are designed for different kinds of usage, one for functional simulation and the other for the simulation of the system with two-level cache. The mismatch of such simulator is less than 10% on average, and the presented simulator is used to evaluate the high-performance video processing systems.

Keywords

multiprocessing systems; shared memory systems; telecommunication computing; video coding; communication network; shared memory; simple scalar-based multicore processor simulator; system-level evaluation design; two-level cache; video processing system; Arrays; Computational modeling; Decoding; Graphics processing unit; Multicore processing; Registers; Simulation; Multi-core processor; SimpleScalar; Simulator; Video processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Autonomous Decentralized Systems (ISADS), 2011 10th International Symposium on

Conference_Location

Tokyo & Hiroshima

Print_ISBN

978-1-61284-213-4

Type

conf

DOI

10.1109/ISADS.2011.34

Filename

5741319