DocumentCode :
2826429
Title :
The application of compiler techniques in systolic array design
Author :
Vehlies, Uwe ; Seiler, Ulrich
Author_Institution :
Laboratorium fuer Informatinostechnol., Hannover Univ., Germany
fYear :
1991
fDate :
11-14 Jun 1991
Firstpage :
240
Abstract :
The authors present a compiler which translates a DSP (digital signal processing) algorithm into a dependence graph suitable for systolic array design. The algorithm, any design constraints, and the external interfaces are described in Pascal and automatically translated into a run time protocol. From the run time protocol the data dependencies and node computations of the dependence graph are extracted. With this compiler most DSP algorithms can be translated into a fully expanded dependence graph. The resulting dependence graphs are as regular as the algorithms. The compiler supports the first step in the process of automatically mapping algorithms onto systolic array processors
Keywords :
Pascal; computerised signal processing; logic CAD; parallel algorithms; program compilers; systolic arrays; DSP algorithms; array processors; compiler techniques; data dependencies; dependence graph; digital signal processing; node computations; run time protocol; systolic array design; Algorithm design and analysis; Convolution; Data mining; Digital signal processing; Hardware; Laboratories; Process design; Protocols; Signal processing algorithms; Systolic arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
Type :
conf
DOI :
10.1109/ISCAS.1991.176318
Filename :
176318
Link To Document :
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