Reduction of discretization errors of dynamics with variable structure and its realization using FPGA

In this paper, in order to reduce discretization errors of dynamics with variable structures (VS), we propose an improved digital integrator. Use of Richardson extrapolation (RE) and fractional delay (FD) can improve Euler integrator, so we can obtain an improved integrator. However, Euler integrator using RE and FD directly has an infinite gain at a Nyquist frequency, and it is unsuitable for integrations of the dynamics with VS. The proposed method, which is suitable for integrations of the dynamics with VS, consists of a high forward gain and feedback structure with a high-precision differentiator. To realize the high-precision differentiator, RE and a high sampling rate instead of FD are used, and those are implemented by FPGA. Its effectiveness is verified by software simulations, hardware in the loop simulations, and experiments.