DocumentCode :
2827698
Title :
A new totally error propagating compactor for arbitrary cores with digital interfaces
Author :
Gössel, M. ; Sogomonyan, E.S. ; Morosov, A.
Author_Institution :
Dept. of Comput. Sci., Univ. of Potsdam, Germany
fYear :
1999
fDate :
1999
Firstpage :
49
Lastpage :
56
Abstract :
In this paper a new totally error propagating compactor is proposed which can be used for arbitrary core-based designs and also for mixed signal ICs with digital interfaces. All errors at the outputs of the cores are detected at the outputs of the proposed compactor. This property is achieved with a small amount of time redundancy
Keywords :
VLSI; built-in self test; integrated circuit testing; mixed analogue-digital integrated circuits; redundancy; BIST; VLSI; arbitrary cores; core-based designs; digital interfaces; mixed signal ICs; time redundancy; totally error propagating compactor; Built-in self-test; Circuit faults; Circuit testing; Compaction; Computer errors; Computer science; Fault tolerance; Hardware; Pins; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1999. Proceedings. 17th IEEE
Conference_Location :
Dana Point, CA
ISSN :
1093-0167
Print_ISBN :
0-7695-0146-X
Type :
conf
DOI :
10.1109/VTEST.1999.766646
Filename :
766646
Link To Document :
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