Title :
Accelerating Tool Path Computing in Turning Lathe Machining
Author :
Jimeno, Antonio ; Cuenca, Sergio ; Martinez, Antonio ; Romero, Jose Luis Sánchez
Author_Institution :
Alicante Univ., Alicante
Abstract :
Tool path generation is one of the most complex problems in computer aided manufacturing. Although some efficient strategies have been developed, most of them are only useful for standard machining. The algorithm called Virtual Digitizing avoids this problem by its own definition but its computing cost is high and make it difficult for being integrated in standard machining in order to adopt the new ISO standard 14649. Presented in the paper there is a Virtual Digitizing architecture that takes the advantages of reconfigurable computing (using field programmable gate arrays) in order to improve the algorithm efficiency. FPGAs are used as low cost and low frequency coprocessor to accelerate the calculation of tool path, meeting the actual restrictions of the computer numeric controls (CNCs) at the same time. A prototype has been implemented to measure the real impact on the total computing time.
Keywords :
computer aided manufacturing; computerised numerical control; field programmable gate arrays; lathes; production engineering computing; reconfigurable architectures; turning (machining); ISO standard 14649; computer aided manufacturing; computer numeric control; field programmable gate arrays; low frequency coprocessor; reconfigurable computing; tool path computing; turning lathe machining; virtual digitizing architecture; Acceleration; Computer aided manufacturing; Computer architecture; Costs; Field programmable gate arrays; Frequency; ISO standards; Machining; Standards development; Turning;
Conference_Titel :
Programmable Logic, 2007. SPL '07. 2007 3rd Southern Conference on
Conference_Location :
Mar del Plata
Print_ISBN :
1-4244-0606-4
DOI :
10.1109/SPL.2007.371727