STG Decomposition: Partitioning Heuristics

STG decomposition is well-known as a promising approach to tackle complexity issues in logic synthesis of asynchronous circuits. It is guided by a partition of output signals and generates a component STG for each partition member. Using the finest partition - one output per component - the resulting circuits might not be optimal (e.g. in terms of area). We present very efficient heuristics to get partitions leading to improved circuits, as confirmed by experiments.