Title :
Enhanced BIST-based diagnosis of FPGAs via boundary scan access
Author :
Hamilton, Carter ; Gibson, Gretchen ; Wijesuriya, Sajitha ; Stroud, Charles
Author_Institution :
Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA
Abstract :
Four methods for accessing BIST for FPGAs via the IEEE 1149.1 standard boundary scan interface are presented and discussed in terms of advantages/disadvantages including their impact on test time and diagnostic resolution. These methods can be used in a variety of FPGA architectures for system level testing and diagnosis
Keywords :
boundary scan testing; built-in self test; fault diagnosis; field programmable gate arrays; integrated circuit testing; logic testing; FPGA architectures; FPGA testing; IEEE 1149.1 standard boundary scan interface; boundary scan access; diagnostic resolution; enhanced BIST-based diagnosis; system level diagnosis; system level testing; test time; Built-in self-test; Fault diagnosis; Feedback; Field programmable gate arrays; Flip-flops; Logic arrays; Logic testing; Read-write memory; Routing; Wire;
Conference_Titel :
VLSI Test Symposium, 1999. Proceedings. 17th IEEE
Conference_Location :
Dana Point, CA
Print_ISBN :
0-7695-0146-X
DOI :
10.1109/VTEST.1999.766697
