DocumentCode :
2828687
Title :
Preliminary Outline of the IEEE PI 500 Scalable Architecture for Testing Embedded Cores
Author :
Adham, Saman ; Burek, D. ; Clark, C.J. ; Collins, Michael ; Giles, G. ; Sales, A. ; Marinissen, Erik Jan ; McLaurin, T. ; Monzel, J. ; Muradali, F. ; Rajoki, J. ; Rajsuman, R. ; Ricchatti, M. ; Stannard, D. ; Udell, J. ; Varma, P. ; Whetsel, L. ; Zamfires
Author_Institution :
Texas Instruments
fYear :
1999
fDate :
25-29 April 1999
Firstpage :
483
Lastpage :
488
Keywords :
Circuit testing; Design automation; Design engineering; Graphics; Instruments; Logic design; Logic testing; Productivity; System testing; Time to market;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1999. Proceedings. 17th IEEE
Conference_Location :
Dana Point, CA, USA
ISSN :
1093-0167
Print_ISBN :
0-7695-0146-X
Type :
conf
DOI :
10.1109/VTEST.1999.766707
Filename :
766707
Link To Document :
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