Title :
Running SPICE in parallel
Author :
Chen, Richard M M ; Siu, W.C. ; Layfield, Andrew H.
Author_Institution :
Dept. of Electron. Eng., City Polytech. of Hong Kong, Hong Kong
Abstract :
The authors describe the implementation and further development of a decomposition algorithm derived to make SPICE (simulation program with integrated circuit emphasis) run in parallel for simulation of large-scale circuits and/or other applications which take advantage of such a parallel processing technique. Transputers were chosen for the hardware platform. Initial test run results confirm the expected improvement in the speed-up factor due to both the decomposition algorithm and the multi-processor implementation
Keywords :
circuit analysis computing; parallel algorithms; parallel programming; transputers; decomposition algorithm; implementation; large scale circuits simulation; multi-processor implementation; parallel processing technique; running SPICE in parallel; simulation program with integrated circuit emphasis; speed-up factor; transputer nets; Circuit simulation; Cities and towns; Differential equations; Hardware; Integrated circuit interconnections; Large-scale systems; Parallel processing; SPICE; Testing; Voltage control;
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
DOI :
10.1109/ISCAS.1991.176504
