• DocumentCode
    2829671
  • Title

    Behavioural description of VLSI circuits based on Petri nets

  • Author

    Abdelrazik, Mohamed B E

  • Author_Institution
    Brunel Univ., Uxbridge, UK
  • fYear
    1991
  • fDate
    11-14 Jun 1991
  • Firstpage
    926
  • Abstract
    The author introduces Petri net models, structural and behavioural, for CMOS circuits. The structural model is suitable for electrical and functional verification, while the behavioural model is suitable for the behavioural verification. Moreover, it is useful for analysis and synthesis of CMOS combinational logic. The extended Petri net is adopted to avoid nondeterministic behaviour and to give a functional capability to the firing rules of a transition. A systematic design methodology is described in order to provide a unified behaviour for both PMOS and NMOS transistors
  • Keywords
    CMOS integrated circuits; Petri nets; VLSI; combinatorial circuits; integrated logic circuits; CMOS circuits; NMOS transistors; PMOS transistors; Petri nets; VLSI circuits; behavioural description; behavioural model; behavioural verification; combinational logic; electrical verification; extended Petri net; functional verification; structural model; systematic design methodology; Circuits; Design automation; Digital systems; MOS devices; MOSFETs; Petri nets; Stochastic processes; Threshold voltage; Timing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1991., IEEE International Sympoisum on
  • Print_ISBN
    0-7803-0050-5
  • Type

    conf

  • DOI
    10.1109/ISCAS.1991.176515
  • Filename
    176515