A structured adaptive neural network for pattern recognition VLSI

A block adaptive neural network structure suitable for VLSI implementation is presented. Compared to the standard structure, the second layer neurons in all local blocks are separated from one another. Therefore, not only can the number of neurons be minimized; but also the global interconnect crossovers can be greatly required, which facilitates VLSI implementation. The block structure converges faster during training since it is much easier to identify different patterns in a multi-dimensional space. The adaptive neuron with a modified least-mean-square (LMS) adaptive algorithm has been used in the system. According to simulation results, the adaptive network with local blocks provides a shorter learning time, a better stability, a better fault-tolerance property. and much better expansion capabilities