Title :
TCAD-SPICE simulation of MOSFET switch delay time for different CMOS technologies
Author :
Petrosyants, K.O. ; Orekhov, E.V. ; Popov, D.A. ; Kharitonov, I.A. ; Sambursky, L.M. ; Yatmanov, A.P. ; Voevodin, A.V. ; Mansurov, A.N.
Author_Institution :
Moscow State Inst. of Electron. & Math., Tech. Univ., Moscow, Russia
Abstract :
A comparison of delay time (td) for n- and p-MOSFETs switches with silicon on sapphire (SOS), silicon on insulator (SOI) and bulk silicon structures is presented. Two step TCAD-SPICE simulation procedure was used to define td for the set of 3.0...0.25 um MOSFETs fabricated by the three mentioned technologies. It was shown that 0.5 um Peregrine UTSi SOS n- and p-MOSFET provided the td reduction of 220-240% in comparison with bulk silicon and 20-25% with SOI.
Keywords :
CMOS integrated circuits; SPICE; elemental semiconductors; field effect transistor switches; silicon; silicon-on-insulator; CMOS technology; MOSFET switch delay time; Peregrine UTSi SOS n-MOSFET; Peregrine UTSi SOS p-MOSFET; TCAD-SPICE simulation; bulk silicon structure; n-MOSFET switch; p-MOSFET switch; silicon-on-insulator structure; silicon-on-sapphire structure; CMOS integrated circuits; Delay; Logic gates; MOSFET circuits; Silicon; Silicon on insulator technology; Switching circuits;
Conference_Titel :
Design & Test Symposium (EWDTS), 2011 9th East-West
Conference_Location :
Sevastopol
Print_ISBN :
978-1-4577-1957-8
DOI :
10.1109/EWDTS.2011.6116411
