DocumentCode
2831917
Title
New architecture for delta-sigma analog-digital converter
Author
Yu, Tsai-Chung ; Yie-Yuan Shieu ; Hsu, Ching-Hwie ; Lin, Tung-Kwan ; Huang, Gwo-Sheng ; Chang, Shin-Shi
Author_Institution
Ind. Technol. Res. Inst., Taiwan
fYear
1991
fDate
11-14 Jun 1991
Firstpage
1533
Abstract
Δ-Σ analog-digital converters based on SC delay and SC differentiators are proposed and constructed. Novel Δ-Σ analog-digital converters can also be incorporated with SC integrators to implement Δ-Σ analog-digital converters with more design flexibility and freedom. Novel SC differentiators and SC delay which do not require a high slew rate op-amp are also described. A design example of a one-bit second-order Δ-Σ analog-digital converter is given. Good performance of simulation responses confirms the correct operation of the proposed structure
Keywords
analogue-digital conversion; delta modulation; switched capacitor networks; SC delay; SC differentiators; SC integrators; analog-digital converter; architecture; delta-sigma ADC; Analog-digital conversion; Circuit noise; Clocks; Delay; Electronics industry; Feedback loop; Industrial electronics; Low-frequency noise; Operational amplifiers; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN
0-7803-0050-5
Type
conf
DOI
10.1109/ISCAS.1991.176668
Filename
176668
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