DocumentCode :
2832495
Title :
Tree-based VLSI architecture with applications to signal processing
Author :
Basu, S.K. ; Gupta, J. Datta ; Gupta, R. Datta
Author_Institution :
Comput. Centre, Banaras Hindu Univ., Varanasi, India
fYear :
1991
fDate :
11-14 Jun 1991
Firstpage :
2105
Abstract :
A VLSI architecture called ring connected trees is presented. Multiprocessing with pipelining is utilized to achieve lower computation time. Parallel algorithms for a number of computational problems from the signal processing domain are given for execution on the proposed machine. The layout of the structure for VLSI implementation is considered. It has an area complexity of O(N log N ) for O(N) processing elements under the grid model of C.D. Thompson (1984). This structure requires less area compared to that of the mesh-of-tree by a logarithmic factor. By using this structure for digital signal processing computations, it is found that most of these signal processing computations could be run in linear time
Keywords :
VLSI; computational complexity; computerised signal processing; digital filters; digital signal processing chips; parallel algorithms; parallel architectures; pipeline processing; trees (mathematics); FIR filter; VLSI architecture; area complexity; computation time; digital signal processing computations; grid model; multiprocessing; parallel algorithms; pipelining; ring connected trees; signal processing; Application software; Computer architecture; Concurrent computing; Digital signal processing; Parallel processing; Pipeline processing; Registers; Signal processing; Signal processing algorithms; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
Type :
conf
DOI :
10.1109/ISCAS.1991.176699
Filename :
176699
Link To Document :
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