DocumentCode :
2832600
Title :
Optimal domain-based reconfiguration algorithm for WSI processor arrays
Author :
Kim, Jung H. ; Rhee, Phill K. ; Park, Sung-kwon
Author_Institution :
Center for Adv. Comput. Studies, Univ. of Southwestern Louisiana, Lafayette, LA, USA
fYear :
1991
fDate :
11-14 Jun 1991
Firstpage :
2140
Abstract :
The authors address an optimal reconfiguration algorithm based on domain constraint. The domain of a logical cell is a set of physical cells where the logical cell can be assigned. A reconfiguration algorithm is defined as optimal if it can find a solution with minimal channel complexity, whenever there exists at least one within the predefined constraints. A reconfiguration problem with a domain-based reconfiguration can be solved by a maximum matching. For the four-cell domain, the maximum matching algorithm with 3 horizontal and 3 vertical tracks is proved as an optimal reconfiguration algorithm
Keywords :
VLSI; computational complexity; logic CAD; logic arrays; systolic arrays; WSI processor arrays; domain constraint; four-cell domain; logical cell domain; maximum matching; minimal channel complexity; optimal reconfiguration algorithm; Area measurement; Hardware; Length measurement; Logic arrays; Partitioning algorithms; Redundancy; Testing; Time measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
Type :
conf
DOI :
10.1109/ISCAS.1991.176708
Filename :
176708
Link To Document :
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