Integrated device and circuit simulation of deep donor trapping effects in DCFL and SCFL inverters

Author

Wang, Tahui ; Wu, Sheng-Jyh

Author_Institution

Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan

fYear

1991

fDate

11-14 Jun 1991

Firstpage

2184

Abstract

An integrated device and circuit simulation has been performed to evaluate the DX-traps-induced performance degradation in direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) AlGaAs/GaAs HEMT inverters. The origin of the DX centers are believed to be due to the complexes of donors (D) and the unknown defects (X). The variation of the output pulse width and the hysteretic characteristics of the input-output voltage transfer function in the inverters are modeled. In comparison with the DCFL inverter, this study shows that the DX-traps-incurred transient phenomena are significantly improved in the SCFL inverters

Keywords

III-V semiconductors; aluminium compounds; deep levels; field effect integrated circuits; gallium arsenide; high electron mobility transistors; integrated logic circuits; logic gates; semiconductor device models; transient response; AlGaAs-GaAs; DCFL inverter; DX centers; HEMT inverters; SCFL inverters; circuit simulation; deep donor trapping effects; device simulation; direct-coupled FET logic; hysteretic characteristics; input-output voltage transfer function; output pulse width; source-coupled FET logic; transient phenomena; Circuit simulation; Degradation; FETs; Gallium arsenide; HEMTs; Logic circuits; Logic devices; Performance evaluation; Pulse inverters; Pulse width modulation inverters;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1991., IEEE International Sympoisum on

Print_ISBN

0-7803-0050-5

Type

conf

DOI

10.1109/ISCAS.1991.176723

Filename

176723