DocumentCode :
2833165
Title :
PASS: a package for automatic scheduling and sharing pipelined data paths
Author :
Jou, Jer Min ; Chin, Chengli Cin ; Li, Yi Ru
Author_Institution :
Dept. of EE, Nat. Cheng Kung Univ., Tainan, Taiwan
fYear :
1991
fDate :
11-14 Jun 1991
Firstpage :
1769
Abstract :
A system for automatic scheduling and sharing data paths has been developed. It is generic; different design styles such as pipeline, chaining, loop pipelines, etc., have been considered, and solutions of fastest possible, cheapest possible, fastest within hardware constraints, or lowest cost within time constraint could be found according to the user´s request. The entire design space then could be explored with it. The scheduling algorithm is stepwise selective dealing with hardware urgency, time urgency, interconnection urgency, data urgency, and control urgency in a serial method with multiple levels of selections. The concept of the sharing algorithm is to consider the inter-influenced properties between operator-sharing and register-sharing, construct two inter-involved sharing criteria for them simultaneously, and then merge them concurrently
Keywords :
logic CAD; pipeline processing; scheduling; software packages; PASS; automatic high-level synthesis; automatic scheduling; chaining; loop pipelines; operator-sharing; package; pipelined data paths; register-sharing; scheduling algorithm; sharing algorithm; stepwise selective; Algorithm design and analysis; Costs; Delay; Hardware; Integrated circuit interconnections; Packaging; Pipelines; Resource management; Scheduling algorithm; Time factors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
Type :
conf
DOI :
10.1109/ISCAS.1991.176746
Filename :
176746
Link To Document :
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