Title :
Computation of exact fault coverage for compact testing schemes
Author :
Lambidonis, D. ; Agarwal, V.K. ; Ivanov, A. ; Xavier, D.
Author_Institution :
Dept. of Electr. Eng., McGill Univ., Montreal, Que., Canada
Abstract :
A strategy based on the use of intermediate signatures is developed that enables the exact fault coverage of compact testing schemes to be determined in a feasible computation time. A model is developed to predict fault simulation time, and used along with a dynamic programming based algorithm to find the optimal scheduling of the signatures with respect to the total simulation time. A more sophisticated model which uses preliminary fault simulation results to make better estimations is also introduced. Simulation results for both models are presented demonstrating the feasibility of the strategy
Keywords :
built-in self test; computerised signal processing; logic testing; compact testing schemes; dynamic programming; exact fault coverage computation; intermediate signatures; optimal scheduling; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Compaction; Computational modeling; Fault detection; Laboratories; Predictive models; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
DOI :
10.1109/ISCAS.1991.176772
