Fault detection and diagnosis based on signature analysis

An examination is made of widely accepted assumptions underlying the analysis of aliasing phenomena and related problems when using linear feedback shift registers. An extensive fault simulation has been used as a tool to collect the required data characterizing the behavior of these circuits together with the test response compactors implemented by LFSRs and MISRs. At least five million test vectors have been simulated and more than 15000 faults have been analyzed in order to obtain the realistic values of such quantities as the fault coverage after compaction, the aliasing probability as a function of a number of tests applied or the number of times a fault is detected, and the histograms of aliased faults. It is shown that the theoretical models of compaction procedures using LFSRs or MISRs yield results very close to those obtained from experiments performed in the fault domain