DocumentCode
2833638
Title
On counter-based compaction
Author
Pilarski, Slawomir ; Wiebe, Kevin
Author_Institution
Sch. of Comput. Sci., Simon Fraser Univ., Burnaby, BC, Canada
fYear
1991
fDate
11-14 Jun 1991
Firstpage
1885
Abstract
A study is made of the three most popular counter-based compaction schemes, i.e., one´s counting, transition counting, and edge counting. For one´s counting, using the asymmetric error model, equations for iterative computations of exact aliasing probability for any test session length are derived, and the asymptotic probability of aliasing is determined. Also presented is a closed form expression that, for any test session length, gives the exact aliasing probability. Some examples that compare the aliasing by counter-based compaction with that by linear feedback shift registers are presented
Keywords
built-in self test; logic testing; BIST; aliasing probability; counter-based compaction schemes; edge counting; linear feedback shift registers; one´s counting; response compaction; transition counting; Automata; Circuit faults; Compaction; Computational complexity; Context modeling; Counting circuits; Equations; Error probability; Linear feedback shift registers; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN
0-7803-0050-5
Type
conf
DOI
10.1109/ISCAS.1991.176775
Filename
176775
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