A verification methodology for reconfigurable systems

Author

Borgatti, M. ; Fedeli, A. ; Rossi, U. ; Lambert, J.-L. ; Moussa, I. ; Fummi, F. ; Marconcini, C. ; Pravadelli, G.

Author_Institution

Central R&D, ST-Microlectron., Geneva, Switzerland

fYear

2004

fDate

9-10 Sept. 2004

Firstpage

85

Lastpage

90

Abstract

In the frame of the Symbad project, an industrial design flow for reconfigurable SoC´s is analyzed by a pool of experts in high-level formal proof tools. The goal of Symbad is to introduce formal verification along this flow. As a consequence, formal verification is applied to specific problems related to reconfigurability. The focus of the paper is on the SymbC tool, which is applied during the HW virtualization phase, when it is mandatory to assure that a task mapped on FPGA is available at the time of its call.

Keywords

field programmable gate arrays; formal verification; integrated circuit design; reconfigurable architectures; system-on-chip; FPGA; HW virtualization phase; SymbC tool; Symbad project; formal verification; industrial design flow; reconfigurability; reconfigurable SoC; reconfigurable systems; Conferences; Design optimization; Field programmable gate arrays; Formal verification; Image processing; Microprocessors; Productivity; Silicon; System recovery; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Microprocessor Test and Verification (MTV'04), Fifth International Workshop on

ISSN

1550-4093

Print_ISBN

0-7695-2320-X

Type

conf

DOI

10.1109/MTV.2004.2

Filename

1563077