A Comparison Study of the Data Vortex Topologies with Different Angle Parameter under Asymmetric I/O Mode

The Data Vortex switch architecture has been proposed as a scalable low-latency all-optical path interconnection fabric for packet switches. To facilitate optical implementation, the Data Vortex architecture employs a cylinder hierarchical topology, synchronous timing and deflection routing that act to reduce the necessary routing logic operations and buffering. The angle parameter of the Data Vortex topology, A, has a significant impact on the accepted traffic and average latency. This paper provides a comparison study of two Data Vortex architectures with A=1 and A >1 (here A=4) under asymmetric input/output (I/O) mode, focusing on the resulting switch performance in accepted traffic and latency. The results show that, for the same switch size, the Data Vortex architecture with A=1 performs better under various traffic patterns by providing more "virtual buffers".