DocumentCode
2834226
Title
Optimal schematic design of low-Q IP blocks
Author
Krutchinsky, Sergey G. ; Tsybin, Mikhail S.
Author_Institution
Dept. of Autom. Control Syst., Taganrog Inst. of Technol. Southern Fed. Univ., Taganrog, Russia
fYear
2011
fDate
9-12 Sept. 2011
Firstpage
196
Lastpage
199
Abstract
Universal procedure of schematic design of compensating feedback loops is offered. The synthesis schemes algorithm with cancellation is formulated. Examples of high-stable circuit with cancellation design are considered and appropriateness of use and development of multidefferential OA as new type of IP blocks of active components is shown.
Keywords
circuit feedback; compensation; differential amplifiers; logic circuits; logic design; operational amplifiers; cancellation design; feedback loops compensation; high-stable circuit; low-Q IP blocks; multidefferential OA; operational amplifier; optimal schematic design; synthesis schemes algorithm; Feedback loop; Low pass filters; Matched filters; Minimization; Q factor; Sensitivity; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2011 9th East-West
Conference_Location
Sevastopol
Print_ISBN
978-1-4577-1957-8
Type
conf
DOI
10.1109/EWDTS.2011.6116582
Filename
6116582
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