DocumentCode :
2834269
Title :
A programmable BIST with macro and micro codes for embedded SRAMs
Author :
Manikandan, P. ; Larsen, Bjørn B. ; Aas, Einar J. ; Areef, Mohammad
Author_Institution :
Norwegian Univ. of Sci. & Technol., Trondheim, Norway
fYear :
2011
fDate :
9-12 Sept. 2011
Firstpage :
144
Lastpage :
150
Abstract :
This paper presents a programmable built-in self-test (PBIST) methodology for embedded SRAMs. The BIST logic adapts the test controller with micro code encoding technique in order to control test operation sequences. The macro codes are used to select any of seven MARCH algorithms, and detect different faults of the memory under test (MUT). This BIST supports both the test and normal operation modes. The experimental results show that this work gives 17-47% improved area overhead and 16-41% enhanced speed compared to three published results.
Keywords :
SRAM chips; built-in self test; embedded SRAM; memory under test; micro code encoding technique; micro codes; programmable BIST logic; programmable built-in self-test methodology; test controller; Algorithm design and analysis; Built-in self-test; Circuit faults; Computer architecture; Couplings; Microprocessors; Random access memory; Macro code; Memory; Micro code; PMBIST; Self-Test;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Test Symposium (EWDTS), 2011 9th East-West
Conference_Location :
Sevastopol
Print_ISBN :
978-1-4577-1957-8
Type :
conf
DOI :
10.1109/EWDTS.2011.6116584
Filename :
6116584
Link To Document :
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