• DocumentCode
    2834282
  • Title

    PDFs testing of combinational circuits based on covering ROBDDs

  • Author

    Matrosova, A. ; Nikolaeva, E.

  • Author_Institution
    Tomsk State Univ., Tomsk, Russia
  • fYear
    2010
  • fDate
    17-20 Sept. 2010
  • Firstpage
    160
  • Lastpage
    163
  • Abstract
    A method of deriving test pair v1, v2 for robust PDFs of special combinational circuit is suggested. Circuit is obtained by covering Shared ROBDD with LUT based CLBs. Test for all PDFs of a circuit is test for all multiple PDFs and for single stuck-at faults at the CLB poles of a circuit.
  • Keywords
    binary decision diagrams; combinational circuits; fault diagnosis; logic testing; table lookup; PDF testing; ROBDD; combinational circuits; lookup table; path delay fault; reduced order binary decision diagram; stuck-at faults; Boolean functions; Circuit faults; Combinational circuits; Data structures; Delay; Input variables; Robustness; equivalent normal form (ENF); path delay fault (PDF); robust PDF;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design & Test Symposium (EWDTS), 2010 East-West
  • Conference_Location
    St. Petersburg
  • Print_ISBN
    978-1-4244-9555-9
  • Type

    conf

  • DOI
    10.1109/EWDTS.2010.5742045
  • Filename
    5742045
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2834282