Fault grading using Instruction-Execution graph

Functional test sequences are used in testing to target faults that are not detected by structural test. However, evaluating the stuck-at fault coverage of the functional test sequence by the gate-level fault simulation can be very time consuming. To obtain a fast estimation of the fault coverage, we describe a metric to grade the test sequence using Instruction-Execution graph. The metric is based on the set of registers the circuit traverses under the test sequence. Using this information in combination with the observability and controllability of the register, the test sequence is graded. Experimental results on Parwan processor show the effectiveness of the metric in ranking the test sequence based on their fault coverage.