A CMOS four-quadrant analog current multiplier

Author

Wiegerink, Remco J.

Author_Institution

MESA Res. Inst., Twente Univ., Enschede, Netherlands

fYear

1991

fDate

11-14 Jun 1991

Firstpage

2244

Abstract

A CMOS four-quadrant analog current multiplier is described. The circuit is based on the square-law characteristic of an MOS transistor and is insensitive to temperature and process variations. The circuit is insensitive to the body effect so it is not necessary to place transistors in individual wells. The multiplier has a large -3-dB bandwidth (50 MHz with 10-μm transistors) and an approximately constant input impedance. The circuit was realized on a CMOS semicustom array. Measurements have shown that the nonlinearity is less than 1% at the maximum input current range and less than 0.2% when the input range is restricted to 50% of the maximum

Keywords

CMOS integrated circuits; analogue circuits; analogue computer circuits; multiplying circuits; 10 micron; 50 MHz; CMOS; MOS transistor; bandwidth; body effect insensitive; constant input impedance; four-quadrant analog current multiplier; linearity; nonlinearity; process variation insensitive; semicustom array; square-law characteristic; temperature insensitive; Circuit simulation; Electrooptic effects; Equations; Impedance; MOSFETs; Mirrors; Temperature; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1991., IEEE International Sympoisum on

Print_ISBN

0-7803-0050-5

Type

conf

DOI

10.1109/ISCAS.1991.176826

Filename

176826