Parameterized IP Infrastructures for fault-tolerant FPGA-based systems: Development, assessment, case-study

Author

Vitaliy, Kulanov ; Vyacheslav, Kharchenko ; Artem, Perepelitsyn

Author_Institution

Nat. Aerosp. Univ. KhAI, Kharkiv, Ukraine

fYear

2010

fDate

17-20 Sept. 2010

Firstpage

452

Lastpage

455

Abstract

The objective of this article is to present technique elements of Intellectual Properties Cores (IP) and Infrastructure IP (IIP) parameterization for fault-tolerant FPGA-based systems (FTFS). The FTFS IIP parameters classification is discussed and some elements of IIP parameterization technique are observed. Case-study of proposed technique is illustrated for the airborne ice protection system.

Keywords

fault tolerance; field programmable gate arrays; industrial property; FTFS IIP parameters classification; airborne ice protection system; fault tolerant FPGA based system; intellectual properties core; parameterized IP infrastructure; Fault tolerant systems; Field programmable gate arrays; Hardware; IP networks; Redundancy; Resource management;

fLanguage

English

Publisher

ieee

Conference_Titel

Design & Test Symposium (EWDTS), 2010 East-West

Conference_Location

St. Petersburg

Print_ISBN

978-1-4244-9555-9

Type

conf

DOI

10.1109/EWDTS.2010.5742075

Filename

5742075

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2834789