DocumentCode :
2835186
Title :
Improved PLL Under Distorted Utility Conditions
Author :
Sinha, Rakesh Kumar ; Sensarma, Partha Sarathi
Author_Institution :
Indian Inst. of Technol., Kanpur
fYear :
2006
fDate :
15-17 Dec. 2006
Firstpage :
1849
Lastpage :
1854
Abstract :
In this paper, an improved algorithm for realizing a phase locked loop (PLL) for three phase system is reported. The reported approach results in fast dynamic response and negligible distortion in PLL output, under severely distorted utility conditions, even with appreciable DC offset in input signals. Also, the locking time obtained is independent of the level of utility distortion. So this PLL is eminently suitable for decoupled control of active and reactive power in all custom power devices, including dynamic voltage restorer (DVR). Important design details are provided which are supported with simulation results. These are experimentally verified and compared with existing methods to highlight the improvements.
Keywords :
phase locked loops; rectifying circuits; DC offset; PLL; distorted utility conditions; dynamic voltage restorer; phase locked loop; three phase system; Algorithm design and analysis; Electric variables control; Frequency measurement; Phase distortion; Phase locked loops; Phase measurement; Power industry; Pulse measurements; Signal restoration; Voltage control; Dynamic Voltage Restorer (DVR); Phase locked loop (PLL);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Technology, 2006. ICIT 2006. IEEE International Conference on
Conference_Location :
Mumbai
Print_ISBN :
1-4244-0726-5
Electronic_ISBN :
1-4244-0726-5
Type :
conf
DOI :
10.1109/ICIT.2006.372423
Filename :
4237745
Link To Document :
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