• DocumentCode
    2835230
  • Title

    Generation of Six Phase Pulse Compression Sequences using FPGA

  • Author

    Balaji, N. ; Rao, Subba K. ; Rao, Srinivasa M.

  • Author_Institution
    VNRVJIET, Hyderabad
  • fYear
    2008
  • fDate
    Aug. 29 2008-Sept. 2 2008
  • Firstpage
    829
  • Lastpage
    835
  • Abstract
    Radar signal processing applications require a set of sequences with individually peaky auto correlation and pair wise cross correlation. Obtaining such sequences is a combinational problem. If the auto correlation and cross correlation are taken in the aperiodic sense then there are hardly any theoretical aids available. The main criterion for good pulse compression sequence is the Merit factor and discrimination. Thus the problem of signal design referred to above are challenging problem for which many global optimization algorithms like genetic algorithm, simulated annealing, tunneling algorithm were reported in the literature. All these optimization algorithms have serious drawbacks of non guaranteed convergence, slow convergence rate and require large number of evaluations of the objective function. To overcome these drawbacks, recently we proposed an efficient VLSI architecture for identification of the six-phase pulse compression sequences. Integrating this architecture with the currently proposing architecture provides an efficient real time hardware solution for identification and generation of the Six phase pulse compression sequences. This paper describes the generation of the Sixphase Pulse compression sequences using field programmable gate array (FPGA). The proposed VLSI architecture is implemented on the FPGA as it provides the flexibility of reconfigurability and reprogrammability.
  • Keywords
    VLSI; field programmable gate arrays; genetic algorithms; radar signal processing; FPGA; VLSI architecture; combinational problem; field programmable gate array; genetic algorithm; radar signal processing; simulated annealing; six phase pulse compression sequences; Autocorrelation; Design optimization; Field programmable gate arrays; Genetic algorithms; Pulse compression methods; Pulse generation; Radar signal processing; Signal design; Signal processing algorithms; Very large scale integration; Behavioral Simulation; FPGA; Merit Factor; Pulse compression; Six phase sequence; VLSI architecture;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Science and Information Technology, 2008. ICCSIT '08. International Conference on
  • Conference_Location
    Singapore
  • Print_ISBN
    978-0-7695-3308-7
  • Type

    conf

  • DOI
    10.1109/ICCSIT.2008.193
  • Filename
    4624983