Silicon integrated nanophotonics for on-chip optical interconnects

The silicon nanophotonic devices have a strong potential to increase tremendously the 10 capacity for inter- and intra-chip connectivity up to a Terabit/sec data rates as well as lower significantly the overall IO power consumption below 1 mW per Gigabit/sec. A concept of a 3DI integrated microprocessor chip with lower layer having hundreds of processing cores, an intermediate memory layer (or multiple memory layers) and an optical interconnects layer on top of the 3D stack. The function of this photonic layer is to provide very high-bandwidth and ultra-low power conversion from electrical to optical signaling, transporting data in the form of optical pulses across the whole chip as well as off the chip, and converting optical signals back to electrical domain to deliver messages between chips or between the distant cores on the same chip.