An optimized Switched Current integrator

Nowadays, Switched Current Technique is at the aim of interest. However, the running of this kind of cells is disturbed by several error sources which affect its performances. The Grounded Gate Class AB Memory Cell is adopted because it solves some of non-idealities affecting the conventional second generation Class A memory cell. Namely, the output to input conductances ratio error, maximum allowed input current and other imperfections like charge injection error and input to output conductance ratio error. Nevertheless, this cell has to be more improved. Thanks to technology evolution some error sources are becoming negligible such as errors due to charge injection. Thus we focused our work on optimizing the cell´s settling time in order to get the ´fastest´ cell. Since the key point to design high performance integrator is to design high performance memory cells, we use the optimized class AB grounded gate memory cell to design improved integrators suitable for designing high performance filters. MATLAB, AMS- 0.35 μm process, SPICE and CADENCE simulation results are presented to show the good reached results.