DocumentCode
2835341
Title
Formal verification of structured analysis and design in HOS
Author
Chiang, Chia-Chu ; Lee, Roger
Author_Institution
Dept. of Comput. Sci., Arkansas Univ., Little Rock, AR, USA
fYear
2005
fDate
11-13 Aug. 2005
Firstpage
282
Lastpage
287
Abstract
Traditional structured analysis and design methods have been criticized because the methods lack formality to provide a design for rigorous development. Several approaches have been developed for verifying a design by integrating traditional structured analysis and design methods with formal specification languages. However, the integration of traditional structured analysis and design methods with formal specification languages may confuse the problem definition and understanding with the attempt to define system structures and algorithms in the design phase. In addition, formal specification languages may add complexity to the design due to the complexity of the language syntax and semantics. In this paper, we are presenting an approach to verification of a structured design in HOS without using formal specification languages. Rules for the partial and total correctness of the design are also discussed.
Keywords
formal languages; formal specification; formal verification; programming language semantics; specification languages; formal specification language; formal verification; higher order software; language semantics; language syntax; proof of correctness; structured analysis; Algorithm design and analysis; Computer science; Conference management; Design methodology; Formal specifications; Formal verification; Large-scale systems; Software design; Software engineering; System analysis and design;
fLanguage
English
Publisher
ieee
Conference_Titel
Software Engineering Research, Management and Applications, 2005. Third ACIS International Conference on
Print_ISBN
0-7695-2297-1
Type
conf
DOI
10.1109/SERA.2005.41
Filename
1563174
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