• DocumentCode
    2835352
  • Title

    Designing combinational circuits with list homomorphisms

  • Author

    Dosch, Walter

  • Author_Institution
    Inst. of Software Technol. & Programming Languages, Univ. of Lubeck, Germany
  • fYear
    2005
  • fDate
    11-13 Aug. 2005
  • Firstpage
    288
  • Lastpage
    297
  • Abstract
    We present a framework for the unifying high-level synthesis of tree-structured and iterative combinational networks. Based on the theory of list homomorphisms, we develop a standard implementation for tree-structured modules processing the input digits in parallel. The design is systematically specialized to iterative networks processing the input sequentially from the least resp. from the highest significant positions. Throughout the paper, we explicate functional methods for the transformational design of combinational circuits. We illustrate the approach with a parity generator module, a comparator module, and a priority resolution module.
  • Keywords
    combinational circuits; formal specification; high level synthesis; parallel programming; combinational circuits design; comparator module; high-level synthesis; iterative combinational network; list homomorphisms theory; parallel programming; parity generator module; priority resolution module; tree-structured network; Algebra; Algorithm design and analysis; Circuit synthesis; Combinational circuits; Computer languages; Hardware; High level synthesis; Iterative algorithms; Network synthesis; Standards development; High-level synthesis; comparator; functional hardware description; iterative network; list homomorphism; parity generator; priority resolution; tree network;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Software Engineering Research, Management and Applications, 2005. Third ACIS International Conference on
  • Print_ISBN
    0-7695-2297-1
  • Type

    conf

  • DOI
    10.1109/SERA.2005.35
  • Filename
    1563175