DocumentCode :
283537
Title :
Cyclic architectures for concurrent processing applications
Author :
Bramley, R.C. ; Creasey, D.J.
Author_Institution :
Sch. of Electron. & Electr. Eng., Birmingham Univ., UK
fYear :
1988
fDate :
32448
Firstpage :
42461
Lastpage :
42464
Abstract :
An optimal algorithm could be defined as one that exploits the properties of the available technology to the full. That is, it takes account of the inadequacies in an implementation and exploits the merits. For example, when multiplication was a very slow operation, algorithms aimed to reduce the number of multiplications needed. The radix-2 fast Fourier transform is an example of this type of algorithm. Similarly, number-theoretic transforms sought to replace multiplications with shifts and additions: operations that could be performed much faster within the constraints of the then existing technology. The advent of VLSI technology has created a fundamental change in the meaning of algorithm optimisation. In VLSI systems, global communication is very difficult but multiplications and additions are fast. The structure of the computation is the most important factor determining throughput. A simple computational structure is demanded. Algorithms must exhibit recursiveness and replication and they must require only local communications for a good VLSI implementation
Keywords :
VLSI; computerised signal processing; matrix algebra; VLSI technology; algorithm optimisation; concurrent processing applications; cyclic architectures; global communication; matrix; recursiveness; replication;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Practical Applications of Parallel Signal Processing, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
209559
Link To Document :
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