Title :
Two-criterial DSSS synchronization method efficiency research
Author :
Kharchenko, H.V. ; Tkalich, I.O. ; Vdovychenko, Y.I.
Author_Institution :
Radio-Electron. Syst. Dept., Kharkov Nat. Univ. of Radio Electron., Kharkov, Ukraine
Abstract :
By the way of simulations using computer, the statistical characteristics of locking in synchronism time, has been determined for the synchronization system, concluding two twin subsystems of spread spectrum signals detection. The criterion of the meaning moment time detection from the domain of uncertainty is “m-multiple repentance iteratively” and “k of n”. VHDL-model of the synchronization system presented in the registry transfer level and implemented in the FPGA ALTERA CYCLONE II EP2C70F672C6 using CAD QUARTUS.
Keywords :
hardware description languages; signal detection; spread spectrum communication; synchronisation; CAD QUARTUS; DSSS synchronization method; FPGA ALTERA CYCLONE II EP2C70F672C6; VHDL model; register transfer level; spread spectrum signal detection; synchronization system; Convolution; Digital signal processing; Field programmable gate arrays; Signal to noise ratio; Solid modeling; Synchronization;
Conference_Titel :
Design & Test Symposium (EWDTS), 2010 East-West
Conference_Location :
St. Petersburg
Print_ISBN :
978-1-4244-9555-9
DOI :
10.1109/EWDTS.2010.5742116
