DocumentCode :
2835519
Title :
Design of a new CMOS output buffer with low switching noise
Author :
Yang, L. ; Yuan, J.S.
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
fYear :
2003
fDate :
9-11 Dec. 2003
Firstpage :
131
Lastpage :
134
Abstract :
In this paper, a new CMOS output buffer with low switching noise and load adaptability is presented. Instead of using current source, the current limiter is proposed to reduce switching noise and the static power dissipation. The output ringing is lowered by automatically turning off one driving stage near the end of the output transition. Compared with the previous designs, the proposed buffer has less switching noise and optimized output ringing and speed. Without the feedback control circuit, the proposed method is simple and easy to be implemented.
Keywords :
CMOS integrated circuits; buffer circuits; circuit feedback; current limiters; integrated circuit design; integrated circuit noise; CMOS output buffer; current limiter; feedback control circuit; load adaptability; static power dissipation; switching noise; Circuit noise; Computer science; Current control; Current limiters; Driver circuits; Mirrors; Noise reduction; Power dissipation; Turning; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
Print_ISBN :
977-05-2010-1
Type :
conf
DOI :
10.1109/ICM.2003.1287739
Filename :
1287739
Link To Document :
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