Title :
Distributed arithmetic architecture for image coding
Author :
Merchant, S.N. ; Rao, B.V.
Author_Institution :
ACRE, Indian Inst. of Technol., Bombay, India
Abstract :
A description is given of the development of a hardware circuit based on a distributed arithmetic architecture to obtain the fast DCT (discrete cosine transform) of a given image. This circuit not only provides DCT transform coefficients but also other transforms´ coefficients. In addition, this circuit also provides inverse transforms with little or no change in components/interconnections. It has also demonstrated that this distributed arithmetic circuit can be used to obtain a fourth order FIR/IIR filter
Keywords :
computerised picture processing; digital arithmetic; digital filters; transforms; DCT transform coefficients; digital arithmetic; discrete cosine transform; distributed arithmetic architecture; fast DCT; fourth order FIR/IIR filter; hardware circuit; image coding; inverse transforms; Arithmetic; Discrete cosine transforms; Discrete transforms; Equations; Finite impulse response filter; Hardware; Image coding; Integrated circuit interconnections; Read only memory; Registers;
Conference_Titel :
TENCON '89. Fourth IEEE Region 10 International Conference
Conference_Location :
Bombay
DOI :
10.1109/TENCON.1989.176898
