DocumentCode :
2835778
Title :
A technique of optimal built-in self-test circuitries generation
Author :
Chebykina, Natalia V. ; Mosin, Sergey G.
Author_Institution :
Comput. Eng. Dept., Vladimir State Univ., Vladimir, Russia
fYear :
2010
fDate :
17-20 Sept. 2010
Firstpage :
145
Lastpage :
148
Abstract :
The technique of generating an optimal built-in self-test (BIST) circuitries has been proposed. The technique is oriented on minimization of hardware overheads and dealt with automatization of BIST circuitries generation. The main idea consists in the use one test generator based on linear feedback shift register (LFSR) in two types of testing - pseudorandom and deterministic. The technique has been realized as CAD subsystems. The experimental results of technique application for some ISCAS´89 benchmark circuits have been shown.
Keywords :
automatic test pattern generation; benchmark testing; built-in self test; circuit CAD; circuit feedback; integrated circuit testing; minimisation; shift registers; BIST circuitry generation automatization; CAD subsystems; ISCAS´89 benchmark circuits; LFSR; deterministic testing; hardware overhead minimization; linear feedback shift register; optimal built-in self-test circuitry; pseudorandom testing; test generator; test pattern generation; Binary sequences; Built-in self-test; Circuit faults; Design automation; Generators; Reliability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Test Symposium (EWDTS), 2010 East-West
Conference_Location :
St. Petersburg
Print_ISBN :
978-1-4244-9555-9
Type :
conf
DOI :
10.1109/EWDTS.2010.5742133
Filename :
5742133
Link To Document :
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