DocumentCode
2835802
Title
Advanced modeling of faults in Reversible circuits
Author
Polian, Ilia ; Hayes, John P.
Author_Institution
Dept. of Inf. & Math., Univ. of Passau, Passau, Germany
fYear
2010
fDate
17-20 Sept. 2010
Firstpage
376
Lastpage
381
Abstract
This survey provides an overview of some recent developments in the testing and design validation of reversible logic circuits Reversible circuits are of interest in ultra-low-power design and in quantum information processing. We describe the fault and error models that have been proposed for these circuits and summarize their properties. We also discuss algorithms for automatic test pattern generation, design-for-testability techniques, and design debugging. We conclude by briefly examining the relationship between classical reversible circuits and quantum circuits.
Keywords
automatic test pattern generation; design for testability; fault tolerant computing; logic circuits; low-power electronics; automatic test pattern generation; design debugging; design-for-testability techniques; quantum circuits; quantum information processing; reversible logic circuits; ultralow-power design; Automatic test pattern generation; Circuit faults; Discrete Fourier transforms; Integrated circuit modeling; Logic gates; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2010 East-West
Conference_Location
St. Petersburg
Print_ISBN
978-1-4244-9555-9
Type
conf
DOI
10.1109/EWDTS.2010.5742135
Filename
5742135
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