Enhancement-mode InP-based HEMT devices and applications

Author

Adesida, I. ; Mahajan, A. ; Cueva, G.

Author_Institution

Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA

fYear

1998

fDate

11-15 May 1998

Firstpage

493

Lastpage

496

Abstract

We have established an enhancement/depletion (E/D) InP high electron mobility transistor (HEMT) process. The fabrication and characterization of circuits employing a direct-coupled FET logic (DCFL) technology are demonstrated using this process. A 23-stage ring oscillator was fabricated and tested. A room temperature propagation delay time (τ_pd) of 16.72 ps/stage as well as a subfemtojoule power-delay product (PDP) of only 0.322 fJ/stage were obtained for the oscillator which, to the best of the authors´ knowledge, is the lowest reported PDP in the InP material system. Also a divide-by-four prescaler was also fabricated and characterized; this demonstrated functionality up to 6 GHz, with a power dissipation of only 5.37 mW/stage. This marks the first time that a prescaler has been fabricated in the InP material system using DCFL technology

Keywords

HEMT integrated circuits; III-V semiconductors; MMIC oscillators; direct coupled FET logic; field effect MMIC; field effect logic circuits; indium compounds; microwave photonics; prescalers; 23-stage ring oscillator; 6 GHz; InP; cascaded divide-by-two circuits; direct-coupled FET logic technology; divide-by-four prescaler; enhancement-mode InP-based HEMT; enhancement/depletion mode; flip flops; lattice matched; monolithic integration; room temperature propagation delay time; subfemtojoule power-delay product; Circuit testing; FETs; Fabrication; HEMTs; Indium phosphide; Logic circuits; Logic devices; MODFETs; Ring oscillators; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Indium Phosphide and Related Materials, 1998 International Conference on

Conference_Location

Tsukuba

ISSN

1092-8669

Print_ISBN

0-7803-4220-8

Type

conf

DOI

10.1109/ICIPRM.1998.712566

Filename

712566