DocumentCode :
2836812
Title :
BBN TC2000 architecture and programming models
Author :
Brooks, E.D., III ; Gorda, B.C. ; Warren, K.H. ; Welcome, T.S.
Author_Institution :
Lawrence Livermore Nat. Lab., CA, USA
fYear :
1991
fDate :
Feb. 25 1991-March 1 1991
Firstpage :
46
Lastpage :
50
Abstract :
The BBN TC2000 is a scalable general-purpose parallel architecture capable of efficiently supporting both shared memory and message passing programming paradigms. The TC2000 machine architecture and the programming models that have been implemented on it are described. In particular, the split-join model, its memory model, and the message passing model are described. Specifics on how the implementation of these models take advantage of the architecture are included. The synchronization primitives offered in PCP (parallel C processor) and PFP (parallel Fortran preprocessor) are discussed, the debugging and performance monitoring abilities within the models are considered. The time and space scheduling mechanism used on the machine is described.<>
Keywords :
parallel architectures; programming; BBN TC2000; PCP; PFP; debugging; memory model; message passing programming paradigms; parallel C processor; parallel Fortran preprocessor; performance monitoring; programming models; scalable general-purpose parallel architecture; scheduling; shared memory; split-join model; synchronization; Computer architecture; Concurrent computing; Laboratories; Libraries; Message passing; Microprocessors; Parallel architectures; Parallel processing; Parallel programming; Supercomputers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compcon Spring '91. Digest of Papers
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-2134-6
Type :
conf
DOI :
10.1109/CMPCON.1991.128781
Filename :
128781
Link To Document :
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